Chengning Wang

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 18

Top Topics

Energy Efficiency

Stream Processing

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ISPA/IUCC/BDCloud/SocialCom/SustainCom

IEEE Trans. Computers

Publications

Wei Zhao, Jie Xu, Xueliang Wei, Bing Wu, Chengning Wang, Weilin Zhu, Wei Tong, Dan Feng, Jingning Liu
A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (1) (2023)
Jinpeng Liu, Wei Tong, Bing Wu, Huan Cheng, Chengning Wang
ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based Accelerators. ICCD (2023)
Wei Zhao, Dan Feng, Wei Tong, Jingning Liu, Zhangyu Chen, Bing Wu, Chengning Wang
APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu
CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays. DAC (2023)
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Yiran Chen
Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Wei Zhao, Yang Zhang, Yiran Chen
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage. IEEE Trans. Computers 70 (4) (2021)
Chengning Wang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Bing Wu, Wei Zhao, Linghao Song, Yang Zhang, Jie Xu, Xueliang Wei, Yiran Chen
Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Wei Zhao, Wei Tong, Dan Feng, Jingning Liu, Zhangyu Chen, Jie Xu, Bing Wu, Chengning Wang, Bo Liu
Improving the energy efficiency of STT-MRAM based approximate cache. DATE (2021)
Yang Zhang, Zhibin Yu, Liang Gu, Chengning Wang, Dan Feng
EnTiered-ReRAM: An Enhanced Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture. IEEE Access 9 (2021)
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Yang Zhang
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (9) (2020)
Xueliang Wei, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Liuqing Ye
CCHL: Compression-Consolidation Hardware Logging for Efficient Failure-Atomic Persistent Memory Updates. ICPP (2020)
Yang Zhang, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Jie Xu
Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture. MSST (2019)
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Mengye Peng
ReRAM Crossbar-Based Analog Computing Architecture for Naive Bayesian Engine. ICCD (2019)
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Zheng Li, Jiayi Chang, Yang Zhang, Bing Wu, Jie Xu, Wei Zhao, Yilin Li, Ruoxi Ren
Cross-point Resistive Memory: Nonideal Properties and Solutions. ACM Trans. Design Autom. Electr. Syst. 24 (4) (2019)
Yang Zhang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Zhipeng Tan, Chengning Wang, Bing Wu, Zheng Li, Gaoxiang Xu
CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System. ACM Trans. Archit. Code Optim. 15 (2) (2018)
Yang Zhang, Dan Feng, Zhipeng Tan, Jingning Liu, Wei Tong, Chengning Wang
Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture. ISPA/IUCC/BDCloud/SocialCom/SustainCom (2018)
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Shuai Li, Mingshun Yang, Chengning Wang, Yang Zhang
Aliens: a novel hybrid architecture for resistive random-access memory. ICCAD (2018)
Chengning Wang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Yang Zhang
DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory. ICCD (2017)