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Yanfeng Xu
ORCID
Publication Activity (10 Years)
Years Active: 2019-2024
Publications (10 Years): 4
Top Topics
Deep Learning
Virtual Memory
Pipelined Architecture
Power Dissipation
Top Venues
IEEE Trans. Very Large Scale Integr. Syst.
ACM Trans. Reconfigurable Technol. Syst.
IEEE Trans. Instrum. Meas.
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Publications
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Yonggen Li
,
Xin Li
,
Haibin Shen
,
Jicong Fan
,
Yanfeng Xu
,
Kejie Huang
An All-digital Compute-in-memory FPGA Architecture for Deep Learning Acceleration.
ACM Trans. Reconfigurable Technol. Syst.
17 (1) (2024)
Rui Xiao
,
Yewei Zhang
,
Bo Wang
,
Yanfeng Xu
,
Jicong Fan
,
Haibin Shen
,
Kejie Huang
A Low-Power In-Memory Multiplication and Accumulation Array With Modified Radix-4 Input and Canonical Signed Digit Weights.
IEEE Trans. Very Large Scale Integr. Syst.
31 (11) (2023)
Yewei Zhang
,
Kejie Huang
,
Rui Xiao
,
Bo Wang
,
Yanfeng Xu
,
Jicong Fan
,
Haibin Shen
An 8-Bit in Resistive Memory Computing Core With Regulated Passive Neuron and Bitline Weight Mapping.
IEEE Trans. Very Large Scale Integr. Syst.
30 (4) (2022)
Qiang Wang
,
Yanfeng Xu
,
Zhongqing Su
,
Maosen Cao
,
Dong Yue
An Enhanced Time-Reversal Imaging Algorithm-Driven Sparse Linear Array for Progressive and Quantitative Monitoring of Cracks.
IEEE Trans. Instrum. Meas.
68 (10) (2019)