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An 8-Bit in Resistive Memory Computing Core With Regulated Passive Neuron and Bitline Weight Mapping.
Yewei Zhang
Kejie Huang
Rui Xiao
Bo Wang
Yanfeng Xu
Jicong Fan
Haibin Shen
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2022)
Keyphrases
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neural network
associative memory
random access memory
computational complexity
information processing
memory size
virtual memory