Wei Wang

Publication Activity (10 Years)

Years Active: 2005-2010
Publications (10 Years): 0

Publications

Chia-Tsun Wu, Wen-Chung Shen, Wei Wang, An-Yeu Wu
A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm. IEEE Trans. Circuits Syst. II Express Briefs (6) (2010)
Wei Wang, I-Chyn Wey, Chia-Tsun Wu, An-Yeu Wu
A portable all-digital pulsewidth control loop for SOC applications. ISCAS (2006)
Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time. ISCAS (2006)
Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu
A scalable DCO design for portable ADPLL designs. ISCAS (6) (2005)