Wei-Shen Wang

Publication Activity (10 Years)

Years Active: 2004-2009
Publications (10 Years): 0

Publications

Michael Orshansky, Wei-Shen Wang
Statistical analysis of circuit timing using majorization. Commun. ACM 52 (8) (2009)
Wei-Shen Wang, Michael Orshansky
Estimation of Leakage Power Consumption and Parametric Yield Based on Realistic Probabilistic Descriptions of Parameters. J. Low Power Electron. 3 (1) (2007)
Wei-Shen Wang, Vladik Kreinovich, Michael Orshansky
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty. DAC (2006)
Wei-Shen Wang, Michael Orshansky
Robust estimation of parametric yield under limited descriptions of uncertainty. ICCAD (2006)
Michael Orshansky, Wei-Shen Wang, Martine Ceberio, Gang Xiang
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips. SAC (2006)
Wei-Shen Wang, Michael Orshansky
Path-Based Statistical Timing Analysis Handling Arbitrary Delay Correlations: Theory and Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (12) (2006)
Bin Zhang, Wei-Shen Wang, Michael Orshansky
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs. ISQED (2006)
Wei-Shen Wang, Michael Liu, Michael Orshansky
Analysis of Leakage Power Reduction in Dual-Vth Technologies in the Presence of Large Threshold Voltage Variation. J. Low Power Electron. 2 (1) (2006)
Michael Liu, Wei-Shen Wang, Michael Orshansky
Leakage power reduction by dual-vth designs under probabilistic analysis of vth variation. ISLPED (2004)