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Vipul J. Patel
ORCID
Publication Activity (10 Years)
Years Active: 2013-2019
Publications (10 Years): 4
Top Topics
Printed Circuit
Texture Synthesis
Execution Speed
Cmos Image Sensor
Top Venues
IEEE J. Solid State Circuits
IEEE Trans. Circuits Syst. I Regul. Pap.
MWSCAS
ISCAS
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Publications
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Ramy Tantawy
,
Vipul J. Patel
,
Dale Shane Smith
,
S. M. Shahriar Rashid
,
Matthew J. Casto
,
Lucas Duncan
,
Roman Fragasse
,
Brian Dupaix
,
Luciano Boglione
,
Joel Goodman
,
Waleed Khalil
Wide-Bandwidth, High-Linearity, 2.8-GS/s, 10-bit Accurate Sample and Hold Amplifier in 130-nm SiGe BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2019)
Ramy Tantawy
,
Vipul J. Patel
,
Dale Shane Smith
,
Matthew J. Casto
,
Lucas Duncan
,
Brian Dupaix
,
Luciano Boglione
,
Joel Goodman
,
Waleed Khalil
A High Linearity, 2.8 GS/s, 10-bit Accurate, Sample and Hold Amplifier in 130 nm SiGe BiCMOS.
ISCAS
(2018)
Lucas Duncan
,
Brian Dupaix
,
Jamin J. McCue
,
Brandon Mathieu
,
Matthew LaRue
,
Vipul J. Patel
,
Mesfin Teshome
,
Myung-Jun Choe
,
Waleed Khalil
A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR.
IEEE J. Solid State Circuits
52 (12) (2017)
Jamin J. McCue
,
Brian Dupaix
,
Lucas Duncan
,
Brandon Mathieu
,
Samantha McDonnell
,
Vipul J. Patel
,
Tony Quach
,
Waleed Khalil
A Time-Interleaved Multimode ΔΣ RF-DAC for Direct Digital-to-RF Synthesis.
IEEE J. Solid State Circuits
51 (5) (2016)
Bert Oyama
,
Daniel Ching
,
Khanh Thai
,
Augusto Gutierrez-Aitken
,
Vipul J. Patel
InP HBT/Si CMOS-Based 13-b 1.33-Gsps Digital-to-Analog Converter With > 70-dB SFDR.
IEEE J. Solid State Circuits
48 (10) (2013)
Samantha M. Yoder
,
Sidharth Balasubramanian
,
Waleed Khalil
,
Vipul J. Patel
Accuracy and speed limitations in DACs across CMOS process technologies.
MWSCAS
(2013)