Valery Salauyou

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 10

Top Topics

Hierarchical Structures

Fault Detection

Structural Model

Input Variables

Top Venues

DepCoS-RELCOMEX

Publications

Valery Salauyou
Fault Detection of Moore Finite State Machines by Structural Models. CISIM (2023)
Valery Salauyou
Embedded Processor Design in FPGA by ASMD-FSMD and FSM-Single Techniques. CISIM (2022)
Valery Salauyou, Adam Klimowicz
Digital Device Design by ASMD-FSMD Technique. CISIM (2021)
Valery Salauyou, Damian Borecki, Tomasz Grzes
The Synthesis Method of High-Speed Finite State Machines in FPGA. CISIM (2020)
Valery Salauyou, Lukasz Zabrocki
Coding Techniques in Verilog for Finite State Machine Designs in FPGA. CISIM (2019)
Damian Borecki, Valery Salauyou, Tomasz Grzes
High-Speed Finite State Machine Design by State Splitting. DepCoS-RELCOMEX (2018)
Valery Salauyou, Irena Bulatowa
Synthesis of High-Speed ASM Controllers with Moore Outputs by Introducing Additional States. CISIM (2018)
Valery Salauyou, Michal Ostapczuk
State Assignment of Finite-State Machines by Using the Values of Input Variables. CISIM (2017)
Valery Salauyou
Synthesis of High-Speed Finite State Machines in FPGAs by State Splitting. CISIM (2016)
Valery Salauyou, Marek Gruszewski
Designing of Hierarchical Structures for Binary Comparators on FPGA/SoC. CISIM (2015)
Adam Klimowicz, Valery Salauyou
The Synthesis of Combined Mealy and Moore Machines Structural Model Using Values of Output Variables as Codes of States. DSD (2012)
Valery Salauyou, Tomasz Grzes
FSM State Assignment Methods for Low-Power Design. CISIM (2007)