Coding Techniques in Verilog for Finite State Machine Designs in FPGA.
Valery SalauyouLukasz ZabrockiPublished in: CISIM (2019)
Keyphrases
- finite state machines
- model checking
- coding scheme
- hardware description language
- state machine
- coding method
- signal processing
- hardware implementation
- hardware design
- finite state automata
- real time image processing
- regular expressions
- state transition
- hardware designs
- real time
- integrated circuit
- cellular automaton
- field programmable gate array
- high speed
- object oriented
- data sources