Travis Forbes

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 1

Top Topics

Analog To Digital Converter

Sampling Strategies

Intersymbol Interference

Top Venues

IEEE J. Solid State Circuits

Publications

Travis Forbes, Benjamin Magstadt, Jesse Moody, Justine Saugen, Andrew Suchanek, Spencer Nelson
Area Efficiency. IEEE J. Solid State Circuits 58 (8) (2023)
Wei-Gi Ho, Travis Forbes, Ranjit Gharpurey
A low-power two-stage harmonic rejection quadrature mixer employing bias-current reuse. MWSCAS (2015)
Travis Forbes, Ranjit Gharpurey
A 2 GS/s Frequency-Folded ADC-Based Broadband Sampling Receiver. IEEE J. Solid State Circuits 49 (9) (2014)
Vineet Kumar Singh, Travis Forbes, Wei-Gi Ho, Jaegan Ko, Ranjit Gharpurey
A 16-band channelizer employing harmonic rejection mixers with enhanced image rejection. CICC (2014)
Wei-Gi Ho, Travis Forbes, Vineet Kumar Singh, Ranjit Gharpurey
An active interference cancellation technique with harmonic rejection for a broadband channelizer. MWSCAS (2013)
Travis Forbes, Wei-Gi Ho, Ranjit Gharpurey
Design and Analysis of Harmonic Rejection Mixers With Programmable LO Frequency. IEEE J. Solid State Circuits 48 (10) (2013)
Travis Forbes, Wei-Gi Ho, Nan Sun, Ranjit Gharpurey
A frequency-folded ADC architecture with digital LO synthesis. ISCAS (2013)
Travis Forbes, Ranjit Gharpurey
Embedded LO synthesis method in harmonic rejection mixers. MWSCAS (2012)