A low-power two-stage harmonic rejection quadrature mixer employing bias-current reuse.

Wei-Gi Ho Travis Forbes Ranjit Gharpurey

Published in: MWSCAS (2015)

Keyphrases

low power
power consumption
low cost
high speed
single chip
high power
low power consumption
vlsi circuits
vlsi architecture
logic circuits
gate array
wireless transmission
digital signal processing
ultra low power
real time
power dissipation
image sensor
delay insensitive
power reduction
video sequences