Toshihiko Yahara

Publication Activity (10 Years)

Years Active: 1979-1983
Publications (10 Years): 0

Publications

Kaoru Okazaki, Tomoko Moriya, Toshihiko Yahara
A multiple media delay simulator for MOS LSI circuits. DAC (1983)
Masayuki Terai, Hajime Kanada, Koji Sato, Toshihiko Yahara
A consideration of the number of horizontal grids used in the routing of a masterslice layout. DAC (1982)
Chiyoji Tanaka, Shinichi Murai, Hiroo Tsuji, Toshihiko Yahara, Kaoru Okazaki, Masayuki Terai, Reiji Katoh, Mikio Tachibana
An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3. DAC (1981)
Kaoru Okazaki, Toshihiko Yahara
Efficient Logic Verification and Test Validation for MOS LSI Circuits. ITC (1981)
Koji Sato, Takao Nagai, Mikio Tachibana, Hiroyoshi Shimoyama, Masaru Ozaki, Toshihiko Yahara
MILD - A cell-based layout system for MOS-LSI. DAC (1981)
Koji Sato, Hiroyoshi Shimoyama, Takao Nagai, Masaru Ozaki, Toshihiko Yahara
A "grid-free" channel router. DAC (1980)
Koji Sato, Takao Nagai, Hiroyoshi Shimoyama, Toshihiko Yahara
MIRAGE - a simple-model routing program for the hierarchical layout design of IC masks. DAC (1979)