Tetsuo Matsui

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 7

Top Topics

Hebbian Learning

Error Diffusion

Top Venues

VLSI Technology and Circuits

Publications

Mitsuya Fukazawa, Tetsuo Matsui
A 24-OSR to Simplify Anti-Aliasing Filter 2MHz-BW 83dB-DR 3rd-order DT-DSM using FIA-Based Integrator and Noise-Shaping SAR Combined Digital Noise-Coupling Quantizer. VLSI Technology and Circuits (2023)
Mitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Atsushi Ochi, Alsubaie Raed, Tetsuo Matsui
A CT 2-2 MASH ΔΣ ADC With Multi-Rate LMS-Based Background Calibration and Input-Insensitive Quantization-Error Extraction. IEEE J. Solid State Circuits 56 (10) (2021)
Mitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Alsubaie Raed, Masao Ito, Tetsuya Matsumoto, Tetsuo Matsui
9.7 Background Multi-Rate LMS Calibration Circuit for 15MHz-BW 74dB-DR CT 2-2 MASH ΔΣ ADC in 28nm CMOS. ISSCC (2020)
Tetsuo Matsui, Keisaku Sento, Tomohiko Ebata, Atsuhiko Ishibashi
A Capacitor Dielectric Relaxation Effect Cancellation Circuit in a 12-Bit, 1-MSps, 5.0-V SAR ADC on a 28-nm Embedded Flash Memory Microcontroller. ESSCIRC (2019)
Atsutomo Murai, Tetsuo Matsui
Gauge Neural Network with Z(2) Synaptic Variables: Phase Structure and Simulation of Learning and Recalling Patterns. Neural Process. Lett. 47 (3) (2018)
Atsutomo Murai, Tetsuo Matsui
Asymmetric Synaptic Connections in Z(2) Gauge Neural Network. ICONIP (4) (2016)
Shinya Sakane, Takashi Hiramatsu, Tetsuo Matsui
Neural Network for Quantum Brain Dynamics: 4D CP ^1 1 +U(1) Gauge Theory on Lattice and Its Phase Structure. ICONIP (1) (2016)