Tejinder Singh Sandhu

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 4

Top Topics

Distributed Architecture

Reference Model

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Yang Ge, Tejinder Singh Sandhu, Dmitri V. Truhachev, Kamal El-Sankary
A Single-TSV and Single-DCDL Approach for Skew Compensation of Multi-Dies Clock Synchronization in 3-D-ICs. IEEE Trans. Very Large Scale Integr. Syst. 31 (4) (2023)
Tejinder Singh Sandhu, Kamal El-Sankary
Supply-Insensitive Digitally Controlled Delay Lines for 3-D IC Clock Synchronization Architectures. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Tejinder Singh Sandhu, Kamal El-Sankary
Beyond Rail-to-Rail Compliant Current Sources for Mismatch-Insensitive Voltage-to-Time Conversion. IEEE Trans. Very Large Scale Integr. Syst. 26 (10) (2018)
Tejinder Singh Sandhu, Kamal El-Sankary
A Mismatch-Insensitive Skew Compensation Architecture for Clock Synchronization in 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Tejinder Singh Sandhu, Kamal El-Sankary, Ezz I. El-Masry
A Distortion-Compensated Charge Transfer Amplifier for a 1.66-MHz Cyclic Pipeline ADC. IEEE Trans. Circuits Syst. II Express Briefs (7) (2010)