Tatsuyuki Ishikawa

Publication Activity (10 Years)

Years Active: 2005-2006
Publications (10 Years): 0

Publications

Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
A parallel LSI architecture for LDPC decoder improving message-passing schedule. ISCAS (2006)
Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto
Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2006)
Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto
High-throughput decoder for low-density parity-check code. ASP-DAC (2006)
Kazunori Shimizu, Tatsuyuki Ishikawa, Takeshi Ikenaga, Satoshi Goto, Nozomu Togawa
Partially-Parallel LDPC Decoder Based on High-Efficiency Message-Passing Algorithm. ICCD (2005)