Tatsunori Murotani

Publication Activity (10 Years)

Years Active: 1995-2000
Publications (10 Years): 0

Publications

Takashi Okuda, Isao Naritake, Tadahiko Sugibayashi, Yuji Nakajima, Tatsunori Murotani
A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor. IEEE J. Solid State Circuits 35 (8) (2000)
Takashi Okuda, Tatsunori Murotani
A four-level storage 4-Gb DRAM. IEEE J. Solid State Circuits 32 (11) (1997)
Tadahiko Sugibayashi, Isao Naritake, Satoshi Utsugi, Kentaro Shibahara, Ryuichi Oikawa, Hidemitsu Mori, Shouichi Iwao, Tatsunori Murotani, Kuniaki Koyama, Shinichi Fukuzawa, Toshiro Itani, Kunihiko Kasama, Takashi Okuda, Shuichi Ohya, Masaki Ogawa
A 1-Gb DRAM for file applications. IEEE J. Solid State Circuits 30 (11) (1995)