Takao Kihara

Publication Activity (10 Years)

Years Active: 2006-2021
Publications (10 Years): 14

Top Topics

Cmos Technology

Background Information

Power Consumption

Top Venues

IEICE Trans. Electron.

Publications

Takao Kihara
Digital Background Correction for Channel Mismatch and Third-Order Nonlinearity of TI-ADCs with VCOs. APCCAS (2021)
Yuka Nakamatsu, Takao Kihara
Dynamic Reduction of Power Consumption in Direct-RF Sampling Receivers with Variable Decimation. APCCAS (2020)
Takao Kihara, Tomoya Takahashi, Tsutomu Yoshimura
Digital Mismatch Correction for Bandpass Sampling Four-Channel Time-Interleaved ADCs in Direct-RF Sampling Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2019)
Takao Kihara, Keisuke Miyakoshi, Tsutomu Yoshimura
Digital Third-Order Nonlinearity Correction for Time-Interleaved A/D Converters with VCOs. ISCAS (2019)
Yuma Isobe, Takao Kihara
First-Order Recursive CIC Filters in Time-Interleaved VCO-Based ADCs for Direct-RF Sampling Receivers. APCCAS (2019)
Fukuyama Tokuya, Takao Kihara, Tsunehiro Yoshio, Tsutomu Yoshimura
A Standard-cell Based A/D Converter with a Back-gate VCO and a Fat Tree Encoder. APCCAS (2018)
Yuma Isobe, Takao Kihara, Tsutomu Yoshimura
A Polyphase Decimation Filter for Time-Interleaved ADCs in Direct-RF Sampling Receivers. APCCAS (2018)
Kazuki Miyao, Tatsuya Okafuji, Takao Kihara, Tsutomu Yoshimura
Study of mutual injection pulling in a 5-GHz, 0.18-μm CMOS cascaded PLL. APCCAS (2018)
Tomoya Takahashi, Takao Kihara, Tsutomu Yoshimura
Digital correction of mismatches in time-interleaved ADCs for digital-RF receivers. ICECS (2017)
Mayu Kobayashi, Yuya Masui, Takao Kihara, Tsutomu Yoshimura
Spur reduction by self-injection loop in a fractional-N PLL. ICECS (2017)
Takao Kihara, Hiroyuki Yano, Tsutomu Yoshimura
Design of cascaded integrator-comb decimation filters for direct-RF sampling receivers. ISCAS (2017)
Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Weimin Wang, Takao Kihara, Toshimasa Matsuoka
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices. IEICE Trans. Electron. (4) (2016)
Naohiro Fujii, Shuei Morishita, Takao Kihara, Tsutomu Yoshimura
A 2.6GHz subharmonically injection-locked PLL with low-spur and wide-lock-range injection. NEWCAS (2016)
Takao Kihara, Shigesato Matsuda, Tsutomu Yoshimura
Analysis and design of differential LNAs with on-chip transformers in 65-nm CMOS technology. NEWCAS (2016)
Saichandrateja Radhapuram, Jung Nam Bae, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A low-power CMOS programmable frequency divider with novel retiming scheme. IEICE Electron. Express 12 (6) (2015)
Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator. IEICE Trans. Electron. (12) (2015)
Shuei Morishita, Shinji Shimizu, Takao Kihara, Tsutomu Yoshimura
Subharmonically injection-locked PLL with variable pulse-width injections. ISCAS (2015)
Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A low-voltage design of controller-based ADPLL for implantable biomedical devices. BioCAS (2015)
Takao Kihara, Tomohiro Sano, Masakazu Mizokami, Yoshikazu Furuta, Mitsuhiko Hokazono, Takaya Maruyama, Tetsuya Heima, Hisayasu Sato
A Multiband LTE SAW-Less CMOS Transmitter with Source-Follower-Driven Passive Mixers, Envelope-Tracked RF-PGAs, and Marchand Baluns. IEICE Trans. Electron. (6) (2013)
Toshimasa Matsuoka, Jun Wang, Takao Kihara, Hyunju Ham, Kenji Taniguchi
Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2010)
Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi
A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. IEICE Trans. Electron. (2) (2010)
Fumiaki Yamashita, Toshimasa Matsuoka, Takao Kihara, Isao Takobe, Hae-Ju Park, Kenji Taniguchi
Analytical design of a 0.5V 5GHz CMOS LC-VCO. IEICE Electron. Express 6 (14) (2009)
Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka, Kenji Taniguchi
A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. IEICE Trans. Electron. (4) (2009)
Takao Kihara, Gue Chol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi
Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2007)
Gue Chol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Masaru Goto, Keisuke Ueda, Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi
Accurate Small-Signal Modeling of FD-SOI MOSFETs. IEICE Trans. Electron. (4) (2006)