Tae-ho Shin

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 6

Top Topics

Signature Verification

Domain Specific

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Youngmin Oh, Hyunwoo Im, Jeonghyu Yang, Eunji Song, Dongjun Lee, Sangwan Lee, Tae-ho Shin, Jaeduk Han
A 100-Gb/s PAM-8 Transmitter With 3-Tap FFE and High-Swing Hybrid Driver in 40-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 71 (6) (2024)
Thi Tuong Vi Vo, Tae-ho Shin, Hyung-Jeong Yang, Sae-Ryung Kang, Soo-Hyung Kim
A comparison between centralized and asynchronous federated learning approaches for survival outcome prediction using clinical and PET data from non-small cell lung cancer patients. Comput. Methods Programs Biomed. 248 (2024)
Tae-ho Shin, Dongjun Lee, Dongwhee Kim, Gaeryun Sung, Wookjin Shin, Yunseong Jo, Hyungjoo Park, Jaeduk Han
LAYGO2: A Custom Layout Generation Engine Based on Dynamic Templates and Grids for Advanced CMOS Technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Jeonghyu Yang, Eunji Song, Seungwook Hong, Dongjun Lee, Sangwan Lee, Hyunwoo Im, Tae-ho Shin, Jaeduk Han
A 100Gb/s 1.6Vppd PAM-8 Transmitter with High-Swing $\mathbf{3+1}$ Hybrid FFE Taps in 40nm. ISSCC (2023)
Tae-ho Shin, Dongjun Lee, Dongwhee Kim, Gaeryun Sung, Wookjin Shin, Yunseong Jo, Hyungjoo Park, Jaeduk Han
A Custom IC Layout Generation Engine Based on Dynamic Templates and Grids. CoRR (2022)
Tae-ho Shin, Jaeduk Han
A SCAN Chain Generator for Verification of Full-Custom Integrated Circuits. ISOCC (2021)
Jinwoo Kim, Tae-ho Shin, Soonhoi Ha, Hyunok Oh
Resource minimized static mapping and dynamic scheduling of SDF graphs. ESTIMedia (2011)
Tae-ho Shin, Hyunok Oh, Soonhoi Ha
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph. ASP-DAC (2011)