T. S. Bindiya

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 23

Top Topics

Top Venues

Circuits Syst. Signal Process.

Digit. Signal Process.

Biomed. Signal Process. Control.

Publications

Hareesh V., T. S. Bindiya
An Improved Rational Approximation of Bark Scale Using Low Complexity and Low Delay Filter Banks. Circuits Syst. Signal Process. 43 (9) (2024)
Mrinmay Sasmal, Tresa Joseph, T. S. Bindiya
Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI. IEEE Comput. Archit. Lett. 23 (1) (2024)
K. R. Sreelekha, T. S. Bindiya
Development of variable 2D FIR filter structures using farrow approximation and row-wise polyphase decomposition. Digit. Signal Process. 141 (2023)
K. R. Sreelekha, T. S. Bindiya
Design of cost effective variable bandwidth 2D low-pass, high-pass and band-pass filters with improved circularity. Digit. Signal Process. 133 (2023)
K. R. Sreelekha, T. S. Bindiya
Development of a 2D Filter Architecture to Obtain Circular Bandwidths Varied by Arbitrary Rational Values Without Restructuring. Circuits Syst. Signal Process. 42 (9) (2023)
Tresa Joseph, T. S. Bindiya
Performance-Driven LSTM Accelerator Hardware Using Split-Matrix-Based MVM. Circuits Syst. Signal Process. 42 (11) (2023)
Tresa Joseph, T. S. Bindiya
Realization and Hardware Implementation of Gating Units for Long Short-Term Memory Network Using Hyperbolic Sine Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Tresa Joseph, T. S. Bindiya
Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders. Circuits Syst. Signal Process. 42 (12) (2023)
K. R. Sreelekha, T. S. Bindiya
Design of variable elliptical filters with direct tunability in 2D domain. Multidimens. Syst. Signal Process. 33 (2) (2022)
Hareesh V., T. S. Bindiya
Design of Hardware Efficient Reconfigurable Merged Partial Cosine Modulated Non-uniform Filter Bank Channelizer and its Power Efficient Implementation Using a Novel Approximation Algorithm. Circuits Syst. Signal Process. 41 (4) (2022)
Sudhi Sudharman, T. S. Bindiya
Design of Reconfigurable FRM Channelizer using Resource Shared Non-maximally Decimated Masking Filters. J. Signal Process. Syst. 93 (8) (2021)
Tresa Joseph, T. S. Bindiya
High Speed and Power Efficient Multiplexer based Matrix Vector Multiplication for LSTM Network. VDAT (2021)
Hareesh V., T. S. Bindiya
Analysis of Different Rational Decimated Filter Banks Derived From the Same Set of Prototype Filters. IEEE Trans. Signal Process. 68 (2020)
Hareesh V., T. S. Bindiya
Design of Low-Complex Linear-Phase Non-uniform Filter Bank to Realize Wavelet Approximation of Bark Frequency Partitioning for Real-Time Applications. Circuits Syst. Signal Process. 39 (9) (2020)
Sudhi Sudharman, T. S. Bindiya
Multiplier-free Realization of High Throughout Transpose Form FIR Filter. CSNDSP (2020)
Sudhi Sudharman, T. S. Bindiya
Design and Implementation of Maximally Decimated Polyphase Filter Bank for Power and Delay Efficient Digital Hearing Aids. TENCON (2019)
K. R. Sreelekha, T. S. Bindiya
A New Multiplier-free Transformation for the Design of Hardware Efficient Circularly Symmetric Wideband 2D Filters. TENCON (2019)
Amir A., T. S. Bindiya, Elizabeth Elias
Low-complexity implementation of efficient reconfigurable structure for cost-effective hearing aids using fractional interpolation. Comput. Electr. Eng. 74 (2019)
Sudhi Sudharman, T. S. Bindiya
Design of Power Efficient Variable Bandwidth Non-Maximally Decimated FRM Filters for Wideband Channelizer. IEEE Trans. Circuits Syst. II Express Briefs (9) (2019)
Sudhi Sudharman, Athul D. Rajan, T. S. Bindiya
Design of a Power-Efficient Low-Complexity Reconfigurable Non-maximally Decimated Filter Bank for High-Resolution Wideband Channels. Circuits Syst. Signal Process. 38 (6) (2019)
Amir A., T. S. Bindiya, Elizabeth Elias
Design and implementation of reconfigurable filter bank structure for low complexity hearing aids using 2-level sound wave decomposition. Biomed. Signal Process. Control. 43 (2018)
Sudhi Sudharman, T. S. Bindiya
Reconfigurable Non-Maximally Decimated Filter Bank based wideband channelizer for VLBI. CCECE (2017)
T. S. Bindiya, Elizabeth Elias
Meta-heuristic evolutionary algorithms for the design of optimal multiplier-less recombination filter banks. Inf. Sci. 339 (2016)
T. S. Bindiya, Elizabeth Elias
Modified Metaheuristic Algorithms for the Optimal Design of Multiplier-Less Non-uniform Channel Filters. Circuits Syst. Signal Process. 33 (3) (2014)
T. S. Bindiya, Elizabeth Elias
Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking. Soft Comput. 18 (8) (2014)