Sung-Yun Park

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 10

Top Topics

Pulse Width Modulation

Energy Efficiency

Interactive Learning

Top Venues

IEEE Trans. Biomed. Circuits Syst.

IEEE J. Solid State Circuits

Publications

Sung-Yun Park, Seung-Jin Hong, Sang-Kwang Lee
Human Interactive Learning with Intrinsic Reward. CoG (2023)
Sungjin Oh, Hyunsoo Song, Nathan Slager, Jose Roberto Lopez Ruiz, Sung-Yun Park, Euisik Yoon
Power-Efficient LFP-Adaptive Dynamic Zoom-and-Track Incremental ΔΣ Front-End for Dual-Band Subcortical Recordings. IEEE Trans. Biomed. Circuits Syst. 17 (4) (2023)
Sungjin Oh, Hyunsoo Song, Nathan Slager, Jose R. L. Ruiz, Sung-Yun Park, Euisik Yoon
LFP-Adaptive Dynamic Zoom-and-Tracking Dual-Band Neural Recording Front-End Using a Power-Efficient Incremental Delta-Sigma ADC. BioCAS (2022)
Sung-Yun Park, Kyounghwan Na, Mihály Vöröslakos, Hyunsoo Song, Nathan Slager, Sungjin Oh, John P. Seymour, György Buzsáki, Euisik Yoon
A Miniaturized 256-Channel Neural Recording Interface With Area-Efficient Hybrid Integration of Flexible Probes and CMOS Integrated Circuits. IEEE Trans. Biomed. Eng. 69 (1) (2022)
Yu-Ju Lin, Hyunsoo Song, Sungjin Oh, Mihály Vöröslakos, Kanghwan Kim, Xing Chen, David D. Wentzloff, György Buzsáki, Sung-Yun Park, Euisik Yoon
A 3.1-5.2GHz, Energy-Efficient Single Antenna, Cancellation-Free, Bitwise Time-Division Duplex Transceiver for High Channel Count Optogenetic Neural Interface. IEEE Trans. Biomed. Circuits Syst. 16 (1) (2022)
Hyunsoo Song, Sungjin Oh, Juan Salinas, Sung-Yun Park, Euisik Yoon
A 5.1ms Low-Latency Face Detection Imager with In-Memory Charge-Domain Computing of Machine-Learning Classifiers. VLSI Circuits (2021)
Adam E. Mendrela, Sung-Yun Park, Mihály Vöröslakos, Michael P. Flynn, Euisik Yoon
A Battery-Powered Opto-Electrophysiology Neural Interface with Artifact-Preventing Optical Pulse Shaping. VLSI Circuits (2018)
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals. IEEE J. Solid State Circuits 53 (4) (2018)
Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon
Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems. IEEE J. Solid State Circuits 53 (2) (2018)
Sun-Il Chang, Sung-Yun Park, Euisik Yoon
Minimally-Invasive Neural Interface for Distributed Wireless Electrocorticogram Recording Systems. Sensors 18 (1) (2018)
Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon
energy-area product. VLSIC (2015)
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems. IEEE Trans. Biomed. Circuits Syst. 9 (6) (2015)
Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon
12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems. ISSCC (2015)