Sizhuo Zhang

ORCID

Publication Activity (10 Years)

Years Active: 2016-2021
Publications (10 Years): 19

Top Venues

Massachusetts Institute of Technology, Cambridge, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, USA

PHD

Publications

Sizhuo Zhang, Nanfeng Xiao
Detailed 3D Human Body Reconstruction From a Single Image Based on Mesh Deformation. IEEE Access 9 (2021)
Sizhuo Zhang, Andrew Wright, Thomas Bourgeat
Composable Building Blocks to Open Up Processor Design. IEEE Micro 39 (3) (2019)
Thomas Bourgeat, Ilia A. Lebedev, Andrew Wright, Sizhuo Zhang, Arvind, Srinivas Devadas
MI6: Secure Enclaves in a Speculative Out-of-Order Processor. MICRO (2019)
Saeid Barati, Ferenc A. Bartha, Swarnendu Biswas, Robert Cartwright, Adam Duracz, Donald S. Fussell, Henry Hoffmann, Connor Imes, Jason E. Miller, Nikita Mishra, Arvind, Dung Nguyen, Krishna V. Palem, Yan Pei, Keshav Pingali, Ryuichi Sai, Andrew Wright, Yao-Hsiang Yang, Sizhuo Zhang
Proteus: Language and Runtime Support for Self-Adaptive Software Development. IEEE Softw. 36 (2) (2019)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright, Mehdi Alipour, Arvind
Constructing a Weak Memory Model. ISCA (2018)
Thomas Bourgeat, Ilia A. Lebedev, Andrew Wright, Sizhuo Zhang, Arvind, Srinivas Devadas
MI6: Secure Enclaves in a Speculative Out-of-Order Processor. CoRR (2018)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright, Mehdi Alipour, Arvind
Constructing a Weak Memory Model. CoRR (2018)
Sizhuo Zhang, Andrew Wright, Thomas Bourgeat, Arvind
Composable Building Blocks to Open up Processor Design. MICRO (2018)
Sang Woo Jun, Andy Wright, Sizhuo Zhang, Shuotao Xu, Arvind
GraFBoost: Using Accelerated Flash Storage for External Graph Analytics. ISCA (2018)
Sizhuo Zhang, Hari Angepat, Derek Chiou
HGum: Messaging Framework for Hardware Accelerators. CoRR (2018)
Sizhuo Zhang, Hari Angepat, Derek Chiou
HGum: Messaging framework for hardware accelerators. ReConFig (2017)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Arvind
An Operational Framework for Specifying Memory Models using Instantaneous Instruction Execution. CoRR (2017)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Arvind
Weak Memory Models: Balancing Definitional Simplicity and Implementation Flexibility. CoRR (2017)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Arvind
Weak Memory Models: Balancing Definitional Simplicity and Implementation Flexibility. PACT (2017)
Sizhuo Zhang, Muralidaran Vijayaraghavan, Dan Lustig, Arvind
Weak Memory Models with Matching Axiomatic and Operational Definitions. CoRR (2017)
Sang Woo Jun, Andy Wright, Sizhuo Zhang, Shuotao Xu, Arvind
BigSparse: High-performance external graph analytics. CoRR (2017)
Sizhuo Zhang, Andrew Wright, Daniel Sánchez, Arvind
Validating Simplified Processor Models in Architectural Studies. CoRR (2016)
Sizhuo Zhang, Arvind, Muralidaran Vijayaraghavan
Taming Weak Memory Models. CoRR (2016)
Sizhuo Zhang, Hari Angepat, Derek Chiou
HGum: Messaging Framework for Hardware Accelerators (Abstact Only). FPGA (2016)

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Publication Activity (10 Years)

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Sizhuo Zhang