Shuguo Li

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 45

Top Topics

High Throughput

Homomorphic Encryption

Efficient Implementation

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Liang Kong, Guojie Qin, Shuguo Li
Design an Efficient FPGA-Based Accelerator for Leveled BFV Homomorphic Encryption. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Wenbo Guo, Shuguo Li
Split-Radix Based Compact Hardware Architecture for CRYSTALS-Kyber. IEEE Trans. Computers 73 (1) (2024)
Tianqi Kong, Shuguo Li
Hardware Acceleration and Implementation of Fully Homomorphic Encryption Over the Torus. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (3) (2024)
Wenbo Guo, Shuguo Li
Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (11) (2023)
Zhen Gu, Shuguo Li
Optimized Interpolation of Four-Term Karatsuba Multiplication and a Method of Avoiding Negative Multiplicands. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (3) (2022)
Wenbo Guo, Shuguo Li, Liang Kong
An Efficient Implementation of KYBER. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Liang Kong, Shuguo Li, Ruirui Liu
High-Performance Constant-Time Discrete Gaussian Sampling. IEEE Trans. Computers 70 (7) (2021)
Jinpeng Lu, Shuguo Li
A Multibit Left-Shift Modular Inverse Hardware Algorithm and its Implementation. ISCAS (2021)
Shuguo Li, Wenbo Guo
Area-Efficient Modular Reduction Structure and Memory Access Scheme for NTT. ISCAS (2021)
Tianqi Kong, Shuguo Li
Design and Analysis of Approximate 4-2 Compressors for High-Accuracy Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 29 (10) (2021)
Yufei Xing, Shuguo Li
A Compact Hardware Implementation of CCA-Secure Key Exchange Mechanism CRYSTALS-KYBER on FPGA. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021 (2) (2021)
Wenbo Guo, Shuguo Li
Fast Binary Counters and Compressors Generated by Sorting Network. IEEE Trans. Very Large Scale Integr. Syst. 29 (6) (2021)
Yating Du, Shuguo Li
A Binary Counter Based on Stacking and Sorting. ICCE (2020)
Qing Liao, Shuguo Li
A New Implementation of 16-bit Parallel Prefix Adder for High Speed and Low Area. ICDSP (2020)
Xiang Feng, Shuguo Li, Sufen Xu
RLWE-Oriented High-Speed Polynomial Multiplier Utilizing Multi-Lane Stockham NTT Algorithm. IEEE Trans. Circuits Syst. II Express Briefs (3) (2020)
Jinnan Ding, Shuguo Li
A Low-Latency and Low-Cost Montgomery Modular Multiplier Based on NLP Multiplication. IEEE Trans. Circuits Syst. II Express Briefs (7) (2020)
Yimeng Chen, Shuguo Li
A High-Throughput Hardware Implementation of SHA-256 Algorithm. ISCAS (2020)
Zhen Gu, Shuguo Li
A Novel Method of Modular Multiplication Based on Karatsuba-like Multiplication. ARITH (2020)
Yufei Xing, Shuguo Li
An Efficient Implementation of the NewHope Key Exchange on FPGAs. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2020)
Zhen Gu, Shuguo Li
A Division-Free Toom-Cook Multiplication-Based Montgomery Modular Multiplication. IEEE Trans. Circuits Syst. II Express Briefs (8) (2019)
Xiang Feng, Shuguo Li
Accelerating an FHE Integer Multiplier Using Negative Wrapped Convolution and Ping-Pong FFT. IEEE Trans. Circuits Syst. II Express Briefs (1) (2019)
Ruirui Liu, Shuguo Li
A Design and Implementation of Montgomery Modular Multiplier. ISCAS (2019)
Zhen Gu, Shuguo Li
A Generalized RNS Mclaughlin Modular Multiplication with Non-Coprime Moduli Sets. IEEE Trans. Computers 68 (11) (2019)
Jinnan Ding, Shuguo Li, Zhen Gu
High-Speed ECC Processor Over NIST Prime Fields Applied With Toom-Cook Multiplication. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2019)
Jinnan Ding, Shuguo Li
A Modular Multiplier Implemented With Truncated Multiplication. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Lijuan Li, Shuguo Li
Improved Algorithms and Implementations for Integer to τ NAF Conversion for Koblitz Curves. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2018)
Lijuan Li, Shuguo Li
High-Performance Pipelined Architecture of Point Multiplication on Koblitz Curves. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Shuguo Li, Zhen Gu
Lazy Reduction and Multi-Precision Division Based on Modular Reductions. APCCAS (2018)
Zhen Gu, Shuguo Li
An Implementation of Karatsuba-based Montgomery Modular Multiplication with Only Half-size Additions. ISCAS (2018)
Yifeng Mo, Shuguo Li
Fast RNS implementation of elliptic curve point multiplication in GF(p) with selected base pairs. FPL (2017)
Lijuan Li, Shuguo Li
Fast inversion in GF(2m) with polynomial basis using optimal addition chains. ISCAS (2017)
Xiang Feng, Shuguo Li
Design of an Area-Effcient Million-Bit Integer Multiplier Using Double Modulus NTT. IEEE Trans. Very Large Scale Integr. Syst. 25 (9) (2017)
Jia Miao, Shuguo Li
A design for high speed leading-zero counter. ISCE (2017)
Lijuan Li, Shuguo Li
High throughput AES encryption/decryption with efficient reordering and merging techniques. FPL (2017)
Xiang Feng, Shuguo Li
Design of a fast number theoretical transform engine for fully homomorphic encryption. ISCE (2017)
Jinnan Ding, Shuguo Li
Determine the carry bit of carry-sum generated by unsigned MBE multiplier without final addition. FPL (2017)
Xiang Feng, Shuguo Li
A High-Speed and SPA-Resistant Implementation of ECC Point Multiplication Over GF(p). TrustCom/BigDataSE/ICESS (2017)
Jinnan Ding, Shuguo Li
A Reconfigurable High-Speed ECC Processor Over NIST Primes. TrustCom/BigDataSE/ICESS (2017)
Jinnan Ding, Shuguo Li
Broken-Karatsuba multiplication and its application to Montgomery modular multiplication. FPL (2017)
Xufan Wu, Shuguo Li
A new digital true random number generator based on delay chain feedback loop. ISCAS (2017)
Yongcheng He, Shuguo Li
A 3DES implementation especially for CBC feedback loop mode. ISCAS (2017)
Yifeng Mo, Shuguo Li
Base Extent Optimization for RNS Montgomery Algorithm. TrustCom/BigDataSE/ICESS (2017)
Yuanhao Wang, Shuguo Li
A High-Speed Digital True Random Number Generator Based on Cross Ring Oscillator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2016)
Xiaojing Du, Shuguo Li
The ASIC Implementation of SM3 Hash Algorithm for High Throughput. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2016)
Lijuan Li, Shuguo Li
). IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Xiang Feng, Shuguo Li
). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (3) (2015)
Tao Wu, Shuguo Li, Litian Liu
Fast RSA decryption through high-radix scalable Montgomery modular multipliers. Sci. China Inf. Sci. 58 (6) (2015)
Lijuan Li, Shuguo Li
A Digital TRNG Based on Cross Feedback Ring Oscillators. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2014)
Tao Wu, Shuguo Li, Litian Liu
Fast, compact and symmetric modular exponentiation architecture by common-multiplicand Montgomery modular multiplications. Integr. 46 (4) (2013)
Tao Wu, Shuguo Li, Litian Liu
CSA-based design of feedforward scalable montgomery modular multiplier. ISSPIT (2011)
Shuguo Li, Fuqiang Cao
Random numbers from an integrated CMOS double-scroll. IEICE Electron. Express 7 (18) (2010)
Shuguo Li, Jian Zhang
Area-delay efficient parallel architecture for Fermat number transform. IEICE Electron. Express 6 (8) (2009)
Jian Zhang, Shuguo Li
High Speed Parallel Architecture for Cyclic Convolution Based on FNT. ISVLSI (2009)
Shuguo Li, Jian Zhang
Efficient FPGA implementation of sharp FIR filters using the FRM technique. IEICE Electron. Express 6 (23) (2009)
Jian Zhang, Shuguo Li
Data-recovery algorithm and circuit for cyclic convolution based on FNT. IEICE Electron. Express 6 (14) (2009)