A Reconfigurable High-Speed ECC Processor Over NIST Primes.

Jinnan Ding Shuguo Li

Published in: TrustCom/BigDataSE/ICESS (2017)

Keyphrases

high speed
low power
national institute of standards and technology
low cost
general purpose
systolic array
reconfigurable architecture
real time
digital signal
error correction
frame rate
error correcting
security analysis
single chip
speaker diarization
multi objective evolutionary
power consumption