Shervin Vakili

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 16

Top Topics

Dynamic Reconfiguration

Content Addressable Memory

Grouping Algorithm

Intrusion Detection System

Top Venues

IEEE Embed. Syst. Lett.

Publications

Mobin Vaziri, Shervin Vakili, M. Mehdi Rahimifar, J. M. Pierre Langlois
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators. CoRR (2024)
Shervin Vakili, Amirhossein Zarei
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs. IEEE Embed. Syst. Lett. 16 (2) (2024)
Shervin Vakili
A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-based Machine Learning Computing. AICAS (2024)
Shervin Vakili
DSCAM+: Latency-Guaranteed FPGA-Based Content Addressable Memory for SDN-Enabled Forwarding Plane. HPCC/DSS/SmartCity/DependSys (2023)
Anees Rehman, Shervin Vakili
A Cost-Effective FPGA-Based Approximate Multiplier for Machine Learning Acceleration. PAAP (2023)
Shervin Vakili, Mobin Vaziri, Amirhossein Zarei, J. M. Pierre Langlois
Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration. CoRR (2023)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois
CARLA: A Convolution Accelerator With a Reconfigurable and Low-Energy Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (8) (2021)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois
An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs. NEWCAS (2020)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois
Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators. NEWCAS (2020)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois
CARLA: A Convolution Accelerator with a Reconfigurable and Low-Energy Architecture. CoRR (2020)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois
An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs. CoRR (2020)
Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria, Naraig Manjikian
Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Commun. 12 (7) (2018)
Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois, Warren J. Gross
Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy. NEWCAS (2018)
Ideh Sarbishei, Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria
Scalable memory-less architecture for string matching with FPGAs. ISCAS (2017)
Shervin Vakili, J. M. Pierre Langlois, Guy Bois
Accuracy-aware processor customisation for fixed-point arithmetic. IET Comput. Digit. Tech. 10 (1) (2016)
Shervin Vakili, J. M. Pierre Langlois, Bochra Boughzala, Yvon Savaria
Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm. ANCS (2016)
Shervin Vakili, J. M. Pierre Langlois, Guy Bois
Designing customized microprocessors for fixed-point computation. AHS (2015)
Shervin Vakili, J. M. Pierre Langlois, Guy Bois
Enhanced Precision Analysis for Accuracy-Aware Bit-Width Optimization Using Affine Arithmetic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (12) (2013)
Shervin Vakili, J. M. Pierre Langlois, Guy Bois
Finite-precision error modeling using affine arithmetic. ICASSP (2013)
Shervin Vakili, J. M. Pierre Langlois, Guy Bois
Customised soft processor design: a compromise between architecture description languages and parameterisable processors. IET Comput. Digit. Tech. 7 (3) (2013)
Shervin Vakili, Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria, Guy Bois
Customized embedded processor design for global photographic tone mapping. ICECS (2011)
Amin Farmahini Farahani, Shervin Vakili, Sied Mehdi Fakhraie, Saeed Safari, Caro Lucas
Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. Eng. Appl. Artif. Intell. 23 (2) (2010)
Shervin Vakili, Sied Mehdi Fakhraie, Siamak Mohammadi
Evolvable multi-processor: A novel MPSoC architecture with evolvable task decomposition and scheduling. IET Comput. Digit. Tech. 4 (2) (2010)