Saiyu Ren

Publication Activity (10 Years)

Years Active: 2004-2021
Publications (10 Years): 10

Top Topics

Cmos Technology

Design Space Exploration

Radio Frequency

Top Venues

Circuits Syst. Signal Process.

J. Circuits Syst. Comput.

Microelectron. J.

Publications

Xiaomeng Zhang, Shuo Li, Ray Siferd, Saiyu Ren
A 170 MHz to 330 MHz Wideband 90 nm CMOS RC-CR Phase Shifter with Integrated On-Line Amplitude Locked Loop Calibration for Hartley Image Rejection Transceiver. Circuits Syst. Signal Process. 40 (11) (2021)
N. V. Vijaya Krishna Boppana, Jeevani Kommareddy, Saiyu Ren
Low-Cost and High-Performance 8 × 8 Booth Multiplier. Circuits Syst. Signal Process. 38 (9) (2019)
Isaac Abraham, Saiyu Ren, Raymond E. Siferd
Logistic Function Based Memristor Model With Circuit Application. IEEE Access 7 (2019)
Isaac Abraham, Saiyu Ren
Memristor based multifunction oscillator. MWSCAS (2019)
Hao Xue, Saiyu Ren
Hardware Trojan detection by timing measurement: Theory and implementation. Microelectron. J. 77 (2018)
Shuo Li, Xiaomeng Zhang, Saiyu Ren
High Frequency Unity Gain Buffer in 90-nm CMOS Technology. J. Circuits Syst. Comput. 25 (7) (2016)
N. V. Vijaya Krishna Boppana, Saiyu Ren
A Low-Power and Area-Efficient 64-Bit Digital Comparator. J. Circuits Syst. Comput. 25 (12) (2016)
Dinesh Varma Penumetcha, Jiafeng Xie, Saiyu Ren
FPGA design space exploration of IDEA cryptography IP core. MWSCAS (2015)
Eswar Raju Suraparaju, Pushpak Vasanth Rayudu Arja, Saiyu Ren
A 1.1-8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology. MWSCAS (2015)
Saiyu Ren, Isaac Abraham, Seng Hong
A 1-6 GHz analog radio frequency power driver in 90 nm complementary metal-oxide semiconductor technology for wireless applications. Int. J. Circuit Theory Appl. 43 (2) (2015)
Joe Gerhardt, Saiyu Ren
Digital Down Converter optimization. MWSCAS (2013)
Christopher Benedik, Saiyu Ren
Passive component stacking to aid power supply decoupling. MWSCAS (2013)
Sunny Raj Dommaraju, Saiyu Ren, George Y. Lee
Design and implementation of a 16-bit flexible ROM-less direct digital synthesizer. MWSCAS (2013)
Saiyu Ren, Ray Siferd
CMOS 1.6 GHz Bandwidth 12 Bit Time Interleaved Pipelined ADC. ITNG (2011)
Saiyu Ren, Ray Siferd
Performance comparison of two low power wide tuning range VCOs in 90 nm CMOS. SoCC (2009)
Saiyu Ren, Ray Siferd, Robert Blumgold
Parallel time interleaved delta sigma band pass analog to digital converter for SOC applications. SoCC (2004)