Rakefet Kol

Publication Activity (10 Years)

Years Active: 1996-2004
Publications (10 Years): 0

Publications

Alex Branover, Rakefet Kol, Ran Ginosar
Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones. DATE (2004)
Kenneth S. Stevens, Shai Rotem, Ran Ginosar, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun, Rakefet Kol, Charles Dike, Marly Roncken
An asynchronous instruction length decoder. IEEE J. Solid State Circuits 36 (2) (2001)
Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun
RAPPID: An Asynchronous Instruction Length Decoder. ASYNC (1999)
Ran Ginosar, Rakefet Kol
Adaptive synchronization. ICCD (1998)
Rakefet Kol, Ran Ginosar
: A High Performance Asynchronous Processor Architecture. International Conference on Supercomputing (1998)
Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. ASYNC (1998)
Rakefet Kol, Ran Ginosar
A Double-Latched Asynchronous Pipeline. ICCD (1997)
Rakefet Kol, Ran Ginosar, Goel Samuel
Statechart methodology for the design, validation, and synthesis of large scale asynchronous systems. ASYNC (1996)