: A High Performance Asynchronous Processor Architecture.

Rakefet Kol Ran Ginosar

Published in: International Conference on Supercomputing (1998)

Keyphrases

computation intensive
distributed memory
management system
parallel architecture
instruction set
multi processor
high speed
software architecture
real time
embedded dram
systolic array
industry standard
processing elements
central processor
array processor
computer architecture
parallel processing
database systems