Raghavendra B. Deshmukh

Publication Activity (10 Years)

Years Active: 2006-2022
Publications (10 Years): 11

Top Topics

Rademacher Complexity

Top Venues

IET Circuits Devices Syst.

Microprocess. Microsystems

Publications

Pravin Zode, Raghavendra B. Deshmukh
Optimization of elliptic curve scalar multiplication using constraint based scheduling. J. Parallel Distributed Comput. 167 (2022)
Pravin Zode, Raghavendra B. Deshmukh
Novel fault attack resistant architecture for elliptic curve cryptography. Microprocess. Microsystems 84 (2021)
Meenu Rani, Sanjay B. Dhok, Raghavendra B. Deshmukh, Punit Kumar
Overlap Aware Compressed Signal Classification. IEEE Access 8 (2020)
Meenu Rani, Sanjay B. Dhok, Raghavendra B. Deshmukh
A Machine Condition Monitoring Framework Using Compressed Signal Processing. Sensors 20 (1) (2020)
Saket Thool, Raghavendra B. Deshmukh, Rajendra M. Patrikar
Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications. VDAT (2018)
Pankaj U. Joshi, Raghavendra B. Deshmukh, Venkateshwarlu Gudur
Self-compensation scheme for truncation error in fixed width multipliers. IET Circuits Devices Syst. 12 (1) (2018)
Vineysarathi Kokkula, Akash Joshi, Raghavendra B. Deshmukh
Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region. VDAT (2018)
Khuushi, Vanadana Jain, Rajendra M. Patrikar, Raghavendra B. Deshmukh
Real Time Mixing Index Measurement of Microchannels Using OpenCV. VDAT (2018)
Pravin Zode, Raghavendra B. Deshmukh, Abdus Samad
Fast Architecture of Modular Inversion Using Itoh-Tsujii Algorithm. VDAT (2017)
Anita Arvind Deshmukh, Raghavendra B. Deshmukh
Design of resolution/power controllable Asynchronous Sigma-Delta Modulator. EURASIP J. Adv. Signal Process. 2016 (2016)
Bharti Navlani, Pankaj U. Joshi, Raghavendra B. Deshmukh
Data dependent spurious power reduction for fixed width multiplier. VDAT (2016)
Pravin Zode, Raghavendra B. Deshmukh
Side channel attack resistant architecture for elliptic curve cryptography. VDAT (2015)
Shrirang Korde, Amol Khandare, Raghavendra B. Deshmukh, Rajendra M. Patrikar
Computational Functions' VLSI Implementation for Compressed Sensing. VDAT (2013)
Anita Arvind Deshmukh, Raghavendra B. Deshmukh, Rajendra M. Patrikar
Low Power Asynchronous Sigma-Delta Modulator Using Hysteresis Level Control. ISVLSI (2011)
Rahul M. Badghare, Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rajendra M. Patrikar
Design of Low Power Parallel Multiplier. J. Low Power Electron. 5 (1) (2009)
Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rahul M. Badghare, Rajendra M. Patrikar
FPGA Implementation of Low Power Parallel Multiplier. VLSI Design (2007)
Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar
Powering Wireless Sensor Nodes using Ambient RF Energy. SMC (2006)