FPGA Implementation of Low Power Parallel Multiplier.
Sanjiv Kumar MangalRaghavendra B. DeshmukhRahul M. BadghareRajendra M. PatrikarPublished in: VLSI Design (2007)
Keyphrases
- low power
- fpga implementation
- hardware implementation
- power consumption
- low cost
- high speed
- field programmable gate array
- low power consumption
- single chip
- high power
- logic circuits
- digital signal processing
- wireless transmission
- efficient implementation
- signal processing
- mixed signal
- power reduction
- vlsi circuits
- massively parallel
- cmos technology
- real time
- vlsi architecture
- image processing algorithms
- parallel processing
- image sensor
- parallel computing
- parallel implementation
- shared memory
- general purpose
- computer vision