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R. Dimple Dayana
Publication Activity (10 Years)
Years Active: 2022-2022
Publications (10 Years): 1
Top Topics
Logic Circuits
Phase Locked Loop
Delay Insensitive
Nm Technology
Top Venues
Wirel. Pers. Commun.
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Publications
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K. Gavaskar
,
R. Dhivya
,
R. Dimple Dayana
Low Power CMOS Design of Phase Locked Loop for Fastest Frequency Acquisition at Various Nanometer Technologies.
Wirel. Pers. Commun.
125 (3) (2022)