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Peizhou Gan
Publication Activity (10 Years)
Years Active: 2019-2024
Publications (10 Years): 4
Top Topics
Low Voltage
Electronic Devices
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
IACR Cryptol. ePrint Arch.
AsianHOST
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
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Publications
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Aneesh Kandi
,
Anubhab Baksi
,
Peizhou Gan
,
Sylvain Guilley
,
Tomas Gerlich
,
Jakub Breier
,
Anupam Chattopadhyay
,
Ritu Ranjan Shrivastwa
,
Zdenek Martinasek
,
Shivam Bhasin
Side-Channel and Fault Resistant ASCON Implementation: A Detailed Hardware Evaluation (Extended Version).
IACR Cryptol. ePrint Arch.
2024 (2024)
Peizhou Gan
,
Xiaojin Zhao
,
Yuan Cao
An All-MOSFET Voltage Reference-Based PUF Featuring Low BER Sensitivity to VT Variations and 163 fJ/Bit in 180-nm CMOS.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
40 (6) (2021)
Peizhou Gan
,
Yiheng Wu
,
Yuan Cao
,
Xiaojin Zhao
A Highly-Reliable and Energy-Efficient Physical Unclonable Function Based on 4T All-MOSFET Subthreshold Voltage Reference.
AsianHOST
(2019)
Xiaojin Zhao
,
Peizhou Gan
,
Qiang Zhao
,
Dejian Liang
,
Yuan Cao
,
Xiaofang Pan
,
Amine Bermak
A 124 fJ/Bit Cascode Current Mirror Array Based PUF With 1.50% Native Unstable Bit Ratio.
IEEE Trans. Circuits Syst. I Regul. Pap.
(9) (2019)