Pablo Viana

Publication Activity (10 Years)

Years Active: 2003-2014
Publications (10 Years): 0

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Learning Environment

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Publications

Mohamad Hammam Alsafrjalani, Ann Gordon-Ross, Pablo Viana
Minimum Effort Design Space Subsetting for Configurable Caches. EUC (2014)
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank Vahid
A table-based method for single-pass cache optimization. ACM Great Lakes Symposium on VLSI (2008)
Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros
A one-shot configurable-cache tuner for improved energy and performance. DATE (2007)
André Silva, Guilherme Esmeraldo, Edna Barros, Pablo Viana
Cache-Analyzer: Design Space Evaluation of Configurable-Caches in a Single-Pass. IEEE International Workshop on Rapid System Prototyping (2007)
Abel Guilhermino Silva-Filho, Pablo Viana, Edna Barros, Manoel Eusebio de Lima
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption. SBAC-PAD (2006)
Pablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid
Configurable cache subsetting for fast cache tuning. DAC (2006)
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. DATE (2004)
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo
Exploring Memory Hierarchy with ArchC. SBAC-PAD (2003)