P. V. Srinivas

Publication Activity (10 Years)

Years Active: 1993-2006
Publications (10 Years): 0

Publications

P. V. Srinivas
Chip assembly: a new paradigm in hierarchical physical design. ISPD (2006)
Xiaoliang Bai, Rajit Chandra, Sujit Dey, P. V. Srinivas
Interconnect coupling-aware driver modeling in static noise analysis for nanometer circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (8) (2004)
Xiaoliang Bai, Rajit Chandra, Sujit Dey, P. V. Srinivas
Noise-Aware Driver Modeling for Nanometer Technology. ISQED (2003)
Aditya Agrawal, P. V. Srinivas, Gade Sreenivas, Uttiya Dasgupta
LATCHECK: A Latchup Checker for VLSI Layouts. VLSI Design (1993)