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P. Nagarajan
Publication Activity (10 Years)
Years Active: 1988-2024
Publications (10 Years): 3
Top Topics
Logic Circuits
Signal Processor
Low Power
Nm Technology
Top Venues
Int. J. Math. Oper. Res.
Int. J. Wavelets Multiresolution Inf. Process.
J. Circuits Syst. Comput.
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Publications
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P. Nagarajan
,
M. Renuga
,
A. Manikandan
,
S. Dhanasekaran
Design and Simulation of a Novel 16T SRAM Cell for Low Power Memory Architecture.
J. Circuits Syst. Comput.
33 (1) (2024)
P. Nagarajan
,
R. Kalyanaraman
/1 queue with unreliable server and Bernoulli vacation.
Int. J. Math. Oper. Res.
25 (4) (2023)
P. Nagarajan
,
N. Ashok Kumar
,
P. Venkat Ramana
Design of implicit pulsed-dual edge triggering flip flop for low power and high speed clocking systems.
Int. J. Wavelets Multiresolution Inf. Process.
18 (1) (2020)
Stephen Fickas
,
P. Nagarajan
Critiquing Software Specifications.
IEEE Softw.
5 (6) (1988)
Stephen Fickas
,
P. Nagarajan
Being Suspicious: Critiquing Problem Specifications.
AAAI
(1988)