Design and Simulation of a Novel 16T SRAM Cell for Low Power Memory Architecture.
P. NagarajanM. RenugaA. ManikandanS. DhanasekaranPublished in: J. Circuits Syst. Comput. (2024)
Keyphrases
- low power
- vlsi architecture
- power consumption
- cmos technology
- single chip
- low cost
- high speed
- nm technology
- power dissipation
- low power consumption
- mixed signal
- analog to digital converter
- logic circuits
- gate array
- digital signal processing
- power reduction
- vlsi circuits
- high power
- wireless transmission
- memory management
- design considerations
- data flow
- low complexity
- signal processing
- real time
- power management
- design methodology
- parallel processing
- memory subsystem
- signal processor