Oswaldo Cadenas

Publication Activity (10 Years)

Years Active: 1999-2021
Publications (10 Years): 2

Top Topics

Optimization Algorithm

Distributed Environment

Intrinsic Mode Functions

Top Venues

IEEE Embed. Syst. Lett.

Publications

Oswaldo Cadenas, Graham M. Megson
Non-uniform quantization with linear average-case computation time. CoRR (2021)
Oswaldo Cadenas, Graham M. Megson
Running Median Algorithm and Implementation for Integer Streaming Applications. IEEE Embed. Syst. Lett. 11 (2) (2019)
Dawid Laszuk, Oswaldo Cadenas, Slawomir J. Nasuto
Objective Empirical Mode Decomposition metric. TSP (2015)
Yuanzhou Ye, Oswaldo Cadenas, Graham M. Megson
Acceleration and visualization of Dynamic Network Optimization. ICNC (2014)
Yuanzhou Ye, Graham M. Megson, Oswaldo Cadenas
Asynchronous distributed parallelization of mobile network optimization algorithms. VITAE (2013)
Yuanzhou Ye, Oswaldo Cadenas, Graham M. Megson
Distributed parallelization of greedy Mobile Network Optimization algorithms. SoftCOM (2013)
Oswaldo Cadenas, Graham M. Megson
Verification and FPGA Circuits of a Block-2 Fast Path-Based Predictor. FPL (2006)
Robert Simon Sherratt, Oswaldo Cadenas, Nomita Goswami
A low clock frequency FFT core implementation for multiband full-rate ultra-wideband (UWB) receivers. IEEE Trans. Consumer Electron. 51 (3) (2005)
Oswaldo Cadenas, Graham M. Megson, Daniel Jones
A New Organization for a Perceptron-Based Branch Predictor and Its FPGA Implementation. ISVLSI (2005)
Oswaldo Cadenas, Graham M. Megson, Daniel Jones
FPGA Organization for the Fast Path-Based Neural Branch Predictor. FPT (2005)
Oswaldo Cadenas, Graham M. Megson, Daniel Jones
Implementation of a block based neural branch predictor. DSD (2005)
Oswaldo Cadenas, Graham M. Megson
A clocking technique for FPGA pipelined designs. J. Syst. Archit. 50 (11) (2004)
Oswaldo Cadenas, Graham M. Megson
A FPGA pipelined backward adaptive scalar quantizer. Circuits, Signals, and Systems (2004)
Oswaldo Cadenas, Graham M. Megson, Toomas P. Plaks
FPGA Circuits for a Monte-Carlo Based Matrix Inversion Architecture. Engineering of Reconfigurable Systems and Algorithms (2003)
Oswaldo Cadenas, Graham M. Megson
Pullpipelining: A technique for systolic pipelined circuits. IWSOC (2003)
Oswaldo Cadenas, Graham M. Megson
A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs. FPL (2002)
Oswaldo Cadenas, Graham M. Megson
Improving mW/MHz Ratio in FPGAs Pipelined Designs. DSD (2002)
Oswaldo Cadenas, Graham M. Megson
A n-Bit Reconfigurable Scalar Quantiser. FPL (2001)
Oswaldo Cadenas, Graham M. Megson
Pipelining Considerations for an FPGA Case. DSD (2001)
Toomas P. Plaks, Oswaldo Cadenas, Graham M. Megson
Experiences Using Reconfigurable FPGAs in Implementing Monte-Carlo Methods. PDPTA (1999)