Verification and FPGA Circuits of a Block-2 Fast Path-Based Predictor.
Oswaldo CadenasGraham M. MegsonPublished in: FPL (2006)
Keyphrases
- high speed
- power reduction
- asynchronous circuits
- hardware implementation
- model checking
- real time image processing
- low power
- neural network
- single chip
- field programmable gate array
- signal processing
- face verification
- formal verification
- hardware architecture
- hardware design
- parallel hardware
- spectral clustering
- analog vlsi
- logic synthesis
- real time
- logic circuits
- image processing
- low cost
- analog circuits
- circuit design
- image quality
- image blocks
- data acquisition