Motoi Inaba

Publication Activity (10 Years)

Years Active: 2000-2010
Publications (10 Years): 0

Publications

Motoi Inaba, Koichi Tanno, Hiroki Tamura, Okihiko Ishizuka
Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits. IEICE Trans. Inf. Syst. (8) (2010)
Motoi Inaba, Koichi Tanno, Ryota Sawada, Hisashi Tanaka, Hiroki Tamura
Optimization of Current-Mode MVD-ORNS Arithmetic Circuits. ISMVL (2009)
Motoi Inaba
Experiment Result of Down Literal Circuit and Analog Inverter on CMOS Double-Polysilicon Process. ISMVL (2007)
Muneo Kushima, Motoi Inaba, Koichi Tanno
Linear and Compact Floating Node Voltage-Controlled Variable Resistor Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2006)
Motoi Inaba, Koichi Tanno, Okihiko Ishizuka
Analog Inverter with Neuron-MOS Transistors and Its Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2002)
Motoi Inaba, Koichi Tanno, Okihiko Ishizuka
Multi-Valued Flip-Flop with Neuron-CMOS NMIN Circuits. ISMVL (2002)
Motoi Inaba, Koichi Tanno, Okihiko Ishizuka
Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators. ISMVL (2001)
Jing Shen, Motoi Inaba, Koichi Tanno, Okihiko Ishizuka
Multi-Valued Logic Pass Gate Network Using Neuron-MOS Transistors. ISMVL (2000)