Mohammad Reza Reshadinezhad

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 14

Top Topics

Computationally Efficient

Image Processing

Top Venues

Microelectron. J.

IEEE Trans. Biomed. Circuits Syst.

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Sarallah Keshavarz, Mohammad Reza Reshadinezhad, Shekoofeh Moghimi
T-count and T-depth efficient fault-tolerant quantum arithmetic and logic unit. Quantum Inf. Process. 23 (7) (2024)
Bahareh Bagheralmoosavi, Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Antonio Rubio
Power-Area Efficient Serial IMPLY-based 4:2 Compressor Applied in Data-Intensive Applications. CoRR (2024)
Fatemeh Kazemi HassanAbadi, Mohammad Reza Reshadinezhad, Zohre Beiki, Fariba Dehghanian
Cascadable-Controllable Self-Assembly DNA Tiles for Large-Scale DNA Logic Circuits. IEEE Trans. Biomed. Circuits Syst. 18 (3) (2024)
Samane Asgari, Mohammad Reza Reshadinezhad, Seyed Erfan Fatemieh
Energy-efficient and fast IMPLY-based approximate full adder applying NAND gates for image processing. Comput. Electr. Eng. 113 (2024)
Samira Shirinabadi Farahani, Mohammad Reza Reshadinezhad, Seyed Erfan Fatemieh
New design for error-resilient approximate multipliers used in image processing in CNTFET technology. J. Supercomput. 80 (3) (2024)
Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad
Energy-Efficient Approximate Full Adders Applying Memristive Serial IMPLY Logic For Image Processing. CoRR (2024)
Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Nima TaheriNejad
Fast and Compact Serial IMPLY-Based Approximate Full Adders Applied in Image Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. 13 (1) (2023)
Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Nima TaheriNejad
Approximate In-Memory Computing using Memristive IMPLY Logic and its Application to Image Processing. ISCAS (2022)
Seyed Erfan Fatemieh, Samira Shirinabadi Farahani, Mohammad Reza Reshadinezhad
LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS. Sustain. Comput. Informatics Syst. 30 (2021)
Arezoo Dabaghi Zarandi, Mohammad Reza Reshadinezhad, Antonio Rubio
A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells. IEEE Access 8 (2020)
Arezoo Dabaghi Zarandi, Antonio Rubio, Mohammad Reza Reshadinezhad
A Memristor-based Quaternary Memory with Adaptive Noise Tolerance. DCIS (2020)
Seyyed Ashkan Ebrahimi, Mohammad Reza Reshadinezhad, Ali Bohlooli
A new design method for imperfection-immune CNFET-based circuit design. Microelectron. J. 85 (2019)
Shiva Rahbar Arabani, Mohammad Reza Reshadinezhad, Majid Haghparast
Design of a parity preserving reversible full adder/subtractor circuit. Int. J. Comput. Intell. Stud. 7 (1) (2018)
Seyyed Ashkan Ebrahimi, Mohammad Reza Reshadinezhad, Ali Bohlooli, Mahyar Shahsavari
Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits. Microelectron. J. 53 (2016)
Mohammad Reza Reshadinezhad, Mohammad Hossein Moaiyeri, Keivan Navi
An Energy-Efficient Full Adder Cell Using CNFET Technology. IEICE Trans. Electron. (4) (2012)