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Design of a parity preserving reversible full adder/subtractor circuit.
Shiva Rahbar Arabani
Mohammad Reza Reshadinezhad
Majid Haghparast
Published in:
Int. J. Comput. Intell. Stud. (2018)
Keyphrases
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circuit design
case study
power dissipation
power consumption
information systems
expert systems
high speed
design process
design decisions
markov chain
chip design
electronic circuits
design tools
data sets
control system
learning algorithm
information retrieval