Mihir N. Mody

Publication Activity (10 Years)

Years Active: 2012-2017
Publications (10 Years): 8

Top Topics

Transformed Image

Vlsi Architecture

Top Venues

Publications

Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Rajat Sagar, Kedar Chitnis, Jason Jones, Brijesh Jadhav, Sujith Shivalingappa, Aish Dubey
A 216 GOPS flexible WDR Image Processor for ADAS SoC. COOL Chips (2017)
Mihir N. Mody, Manu Mathew, Shyam Jagannathan, Arthur Redfern, Jason Jones, Thorsten Lorenzen
CNN inference: VLSI architecture for convolution layer for 1.2 TOPS. SoCC (2017)
Mihir N. Mody, Niraj Nandan, Hetul Sanghvi
Efficient VLSI architecture for SAO decoding in 4K Ultra-HD HEVC video codec. SoCC (2016)
Prashanth Viswanath, Kedar Chitnis, Pramod Swami, Mihir N. Mody, Sujith Shivalingappa, Soyeb Nagori, Manu Mathew, Kumar Desappan, Shyam Jagannathan, Deepak Poddar, Anshu Jain, Hrushikesh Garud, Vikram V. Appia, Mayank Mangla, Shashank Dabral
A Diverse Low Cost High Performance Platform for Advanced Driver Assistance System (ADAS) Applications. CVPR Workshops (2016)
Shyam Jagannathan, Mihir N. Mody, Manu Mathew
Optimizing convolutional neural network on DSP. ICCE (2016)
Mihir N. Mody, Niraj Nandan, Hetul Sanghvi, Rajasekhar Allu, Rajat Sagar
Flexible Wide Dynamic Range (WDR) processing support in image signal processor (ISP). ICCE (2015)
Rahul Gulati, Vasant Easwaran, Prashant Karandikar, Mihir N. Mody, Prithvi Shankar
Resolving ADAS imaging subsystem functional safety quagmire. ICCE (2015)
Mihir N. Mody, Pramod Swami, Kedar Chitnis, Shyam Jagannathan, Kumar Desappan, Anshu Jain, Deepak Poddar, Zoran Nikolic, Prashanth Viswanath, Manu Mathew, Soyeb Nagori, Hrushikesh Garud
High Performance Front Camera ADAS Applications on TI's TDA3X Platform. HiPC (2015)
Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Dharmendra Soni, Sunil Sah, Gayathri Seshadri, Prashant Karandikar
High performance and flexible imaging Sub-system. ICACCI (2014)
Prashant Karandikar, Mihir N. Mody, Hetul Sanghvi, Vasant Easwaran, Prithvi Shankar, Rahul Gulati, Niraj Nandan, Subrangshu Das
Efficient system level cache architecture for multimedia SoC. ICACCI (2014)
Vasant Easwaran, Virendra Bansal, Greg Shurtz, Rahul Gulati, Mihir N. Mody, Prashant Karandikar, Prithvi Shankar
A unique non-intrusive approach to non-ATE Based cul-de-sac SoC debug. SoCC (2014)
Vasant Easwaran, Mihir N. Mody, Prithvi Shankar
Re-configurable coherent event forwarding mechanism for multiprocessor systems. ISSPIT (2014)
Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry
A 28nm programmable and low power ultra-HD video codec engine. ISCAS (2014)
Mihir N. Mody, Hrushikesh Garud, Soyeb Nagori, Dipan Kumar Mandal
High throughput VLSI architecture for HEVC SAO encoding for ultra HDTV. ISCAS (2014)
Niraj Nandan, Mihir N. Mody, Hetul Sanghvi, Prithvi Shankar
Customization of de-blocking filter edge order for high performance: Study of H.264 AVC/SVC, H.265. ISSPIT (2014)
Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Nainala Vyagrheswarudu, Vijayavardhan Baireddy, Pavan Shastry
A monolithic programmable Ultra-HD video codec engine. ICASSP (2014)
Mahesh Mehendale, Subrangshu Das, Mohit Sharma, Mihir N. Mody, Ratna Reddy, Joseph Meehan, Hideo Tamama, Brian Carlson, Mike Polley
A true multistandard, programmable, low-power, full HD video-codec engine for smartphone SoC. ISSCC (2012)