Michael A. Riepe

Publication Activity (10 Years)

Years Active: 1993-2003
Publications (10 Years): 0

Publications

Michael A. Riepe, Karem A. Sakallah
Transistor placement for noncomplementary digital VLSI cell synthesis. ACM Trans. Design Autom. Electr. Syst. 8 (1) (2003)
Michael A. Riepe, Karem A. Sakallah
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis. ISPD (1999)
Michael A. Riepe, Karem A. Sakallah
The edge-based design rule model revisited. ACM Trans. Design Autom. Electr. Syst. 3 (3) (1998)
Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown
Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation. IEEE Trans. Very Large Scale Integr. Syst. 4 (1) (1996)
Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation. ICCD (1993)