Mathieu Gross

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 9

Top Topics

Internal Memory

Hardware Software Co Design

Fpga Technology

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

ACM Trans. Embed. Comput. Syst.

IACR Cryptol. ePrint Arch.

Publications

Mathieu Gross, Robert Kunzelmann, Georg Sigl
CPU to FPGA Power Covert Channel in FPGA-SoCs. IACR Cryptol. ePrint Arch. 2023 (2023)
Mathieu Gross, Jonas Krautter, Dennis Gnad, Michael Gruber, Georg Sigl, Mehdi B. Tahoori
FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU. ASP-DAC (2023)
Mathieu Gross, Nisha Jacob, Andreas Zankl, Georg Sigl
Breaking TrustZone memory isolation and secure boot through malicious hardware on a modern FPGA-SoC. J. Cryptogr. Eng. 12 (2) (2022)
Mathieu Gross, Konrad Hohentanner, Stefan Wiehler, Georg Sigl
Enhancing the Security of FPGA-SoCs via the Usage of ARM TrustZone and a Hybrid-TPM. ACM Trans. Reconfigurable Technol. Syst. 15 (1) (2022)
Johanna Sepúlveda, Mathieu Gross, Andreas Zankl, Georg Sigl
Beyond Cache Attacks: Exploiting the Bus-based Communication Structure for Powerful On-Chip Microarchitectural Attacks. ACM Trans. Embed. Comput. Syst. 20 (2) (2021)
Mathieu Gross, Nisha Jacob, Andreas Zankl, Georg Sigl
Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC. ASHES@CCS (2019)
Georg Sigl, Mathieu Gross, Michael Pehl
Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. ESSCIRC (2018)
Johanna Sepúlveda, Mathieu Gross, Andreas Zankl, Georg Sigl
Towards trace-driven cache attacks on Systems-on-Chips - exploiting bus communication. ReCoSoC (2017)
Johanna Sepúlveda, Mathieu Gross, Andreas Zankl, Georg Sigl
Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips. ISVLSI (2017)