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Matheus B. R. Cardoso
ORCID
Publication Activity (10 Years)
Years Active: 2021-2023
Publications (10 Years): 3
Top Topics
Hardware Architecture
Instruction Set
Floating Point Arithmetic
Chaotic Map
Top Venues
Comput. Electr. Eng.
IEEE Trans. Instrum. Meas.
ISCAS
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Publications
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Samuel S. da Silva
,
Matheus B. R. Cardoso
,
Lucas Giovanni Nardo
,
Erivelton Geraldo Nepomuceno
,
Michael Hübner
,
Janier Arias-Garcia
A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format.
IEEE Trans. Instrum. Meas.
72 (2023)
Matheus B. R. Cardoso
,
Samuel S. da Silva
,
Lucas Giovanni Nardo
,
Roberto M. Passos
,
Erivelton G. Nepomuceno
,
Janier Arias-Garcia
A New PRNG Hardware Architecture Based on an Exponential Chaotic Map.
ISCAS
(2021)
Túlio Araujo
,
Matheus B. R. Cardoso
,
Erivelton G. Nepomuceno
,
Carlos H. Llanos
,
Janier Arias-Garcia
A new floating-point adder FPGA-based implementation using RN-coding of numbers.
Comput. Electr. Eng.
90 (2021)