Marcelo Daniel Berejuck

Publication Activity (10 Years)

Years Active: 2009-2021
Publications (10 Years): 10

Top Topics

Personalised Learning

Educational Material

Learning Objects

Top Venues

Microelectron. Reliab.

Int. J. Sens. Networks

Publications

Marcelo Daniel Berejuck, Jhennifer Cristine Matias, Emilio Werner, Hamadou Saliah-Hassane
Work-in Progress: Development of an E-learning FPGA Platform Following the IEEE SA Std. 1876 - 2019 Standard for Networked Smart Learning Objects for Online Laboratories. REV (2021)
Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales, Eduardo Augusto Bezerra
MPI hardware framework for many-core based embedded systems. Int. J. Sens. Networks 35 (1) (2021)
Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane
Evaluation of blockchain techniques to ensure secure access on remote FPGA laboratories. ISDFS (2021)
Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane
Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories. REV (2021)
Julian J. Lopez-Salamanca, Laio Oriel Seman, Marcelo Daniel Berejuck, Eduardo A. Bezerra
Finite-State Markov Chains Channel Model for CubeSats Communication Uplink. IEEE Trans. Aerosp. Electron. Syst. 56 (1) (2020)
Gabriel Ganzer, Marcelo Daniel Berejuck
Dedicated monitoring service without routing mitigation for Networks-on-Chip. LASCAS (2019)
Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs. Microelectron. Reliab. 83 (2018)
Rodrigo V. M. Pereira, Fernando Rangel de Sousa, Eduardo Augusto Bezerra, Marcelo Daniel Berejuck
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library. SBESC (2017)
Marcelo Daniel Berejuck
An overview about Networks-on-Chip with multicast suppor. CoRR (2016)
Marcelo Daniel Berejuck, Antônio Augusto Fröhlich
Evaluation of a Connectionless Technique for System-on-Chip Interconnection. J. Circuits Syst. Comput. 25 (10) (2016)
Marcelo Daniel Berejuck
Network-on-Chip with load balancing based on interleave of flits technique. CoRR (2015)
Marcelo Daniel Berejuck, Antônio Augusto Fröhlich
Evaluation of silicon consumption for a connectionless Network-on-Chip. CoRR (2014)
Marcelo Daniel Berejuck, César Albenes Zeferino
Adding mechanisms for QoS to a network-on-chip. SBCCI (2009)