Maddu Karunaratne

Publication Activity (10 Years)

Years Active: 1993-2015
Publications (10 Years): 1

Top Topics

Face Verification

Estimation Process

Top Venues

J. Low Power Electron.

Publications

Maddu Karunaratne, Assim Sagahyroon
A Dynamic Power Estimation Method for System on Chip Designs. J. Low Power Electron. 11 (4) (2015)
Maddu Karunaratne, Bejoy Oomann
An Optimal Memory BISR Implementation. J. Comput. 8 (9) (2013)
Assim Sagahyroon, Geetha Lakkaraj, Maddu Karunaratne
Verification Components Reuse. J. Comput. 7 (11) (2012)
Assim Sagahyroon, Maddu Karunaratne
Cell Library Creation using ALF. J. Comput. Inf. Technol. 13 (3) (2005)
Manzer Masud, Maddu Karunaratne
Test generation based on synthesizable VHDL descriptions. EURO-DAC (1993)