Maciej Kopczynski

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 11

Top Topics

Discernibility Matrix

Attribute Reduction

Top Venues

Fundam. Informaticae

Publications

Maciej Kopczynski, Tomasz Grzes
FPGA supported rough set reduct calculation for big datasets. J. Intell. Inf. Syst. 59 (3) (2022)
Maciej Kopczynski
Mobile Phone as a 6DoF Motion Controller. CISIM (2022)
Maciej Kopczynski, Tomasz Grzes
Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets. J. Artif. Intell. Soft Comput. Res. 11 (2) (2021)
Maciej Kopczynski
FPGA in Core Calculation for Big Datasets. CISIM (2021)
Michal Czolombitko, Tomasz Grzes, Maciej Kopczynski, Urszula Kuzelewska, Anna Lupinska-Dubicka, Dorota Mozyrska, Joanna Panasiuk
Development of Digital Competences of Elementary School Teachers with a Life-Long Learning Approach. CISIM (2021)
Maciej Kopczynski, Tomasz Grzes
Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets. ICARCV (2020)
Tomasz Grzes, Maciej Kopczynski
Hardware Implementation on Field Programmable Gate Array of Two-Stage Algorithm for Rough Set Reduct Generation. IJCRS (2019)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Hardware Supported Rule-Based Classification on Big Datasets. IJCRS (1) (2017)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Rough Sets Based LEM2 Rules Generation Supported by FPGA. Fundam. Informaticae 148 (1-2) (2016)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Hardware Supported Rough Sets Based Rules Generation for Big Datasets. CISIM (2016)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Core for Large Datasets: Rough Sets on FPGA. Fundam. Informaticae 147 (2-3) (2016)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Computation of Cores in Big Datasets: An FPGA Approach. RSKT (2015)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Core for Large Datasets: Rough Sets on FPGA. CS&P (2015)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
FPGA in Rough-Granular Computing: Reduct Generation. WI-IAT (1) (2014)
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk
Generating Core in Rough Set Theory: Design and Implementation on FPGA. RSEISP (2014)
Jaroslaw Stepaniuk, Maciej Kopczynski, Tomasz Grzes
The First Step Toward Processor for Rough Set Methods. Fundam. Informaticae 127 (1-4) (2013)
Tomasz Grzes, Maciej Kopczynski, Jaroslaw Stepaniuk
FPGA in Rough Set Based Core and Reduct Computation. RSKT (2013)