Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets.
Maciej KopczynskiTomasz GrzesPublished in: ICARCV (2020)
Keyphrases
- rough sets
- xilinx virtex
- hardware architecture
- parallel architecture
- hardware implementation
- fpga device
- field programmable gate array
- rough set theory
- general purpose processors
- processing elements
- dedicated hardware
- distributed memory
- single chip
- hardware design
- instruction set
- software implementation
- discernibility matrix
- hardware architectures
- fuzzy sets
- fpga technology
- decision rules
- reconfigurable hardware
- data mining
- rule extraction
- attribute reduction
- pipelined architecture
- dominance relation
- tool for data mining
- fuzzy rough sets
- information entropy
- rule induction
- shared memory
- rough sets theory
- data analysis
- real time
- continuous valued attributes
- low cost
- fuzzy logic
- pattern recognition
- image processing
- multi core processors
- ibm zenterprise
- hardware software
- attribute set
- decision table
- embedded systems
- artificial intelligence
- functional units
- attribute reduction algorithm
- genetic algorithm
- knowledge acquisition
- data mining algorithms
- concept lattice