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Luca Ravezzi
ORCID
Publication Activity (10 Years)
Years Active: 2006-2021
Publications (10 Years): 2
Top Topics
Cmos Technology
Failure Prediction
Clock Gating
High Speed
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
VLSIC
IEEE Trans. Circuits Syst. II Express Briefs
ISSCC
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Publications
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Luca Ravezzi
Failure in Ring Oscillators With Capacitive Load.
IEEE Trans. Circuits Syst. I Regul. Pap.
68 (8) (2021)
Luca Ravezzi
Up-Conversion of Clock Phase Noise in Plesiochronous Data Links.
IEEE Trans. Circuits Syst. II Express Briefs
(12) (2018)
Luca Ravezzi
,
Hamid Partovi
Clock and Synchronization Networks for a 3 GHz 64 Bit ARMv8 8-Core SoC.
IEEE J. Solid State Circuits
50 (7) (2015)
Luca Ravezzi
,
Hamid Partovi
,
D. Wang
,
C. Wang
,
R. Cohen
,
M. Ashcraft
,
Alfred Yeung
,
Qawi Harvard
,
Russell Homer
,
John Ngai
,
Greg Favor
Clock and synchronization networks for a 3GHz 64bit ARMv8 8-core SoC.
ESSCIRC
(2014)
Alfred Yeung
,
Hamid Partovi
,
Qawi Harvard
,
Luca Ravezzi
,
John Ngai
,
Russell Homer
,
M. Ashcraft
,
Greg Favor
5.8 A 3GHz 64b ARM v8 processor in 40nm bulk CMOS technology.
ISSCC
(2014)
Hamid Partovi
,
Alfred Yeung
,
Luca Ravezzi
,
Mark Horowitz
A 3-stage Pseudo Single-phase Flip-flop family.
VLSIC
(2012)
Hamid Partovi
,
Karthik Gopalakrishnan
,
Luca Ravezzi
,
Russell Homer
,
Otto Schumacher
,
Reinhold Unterricker
,
Werner Kederer
Single-ended transceiver design techniques for 5.33Gb/s graphics applications.
ISSCC
(2009)
Hamid Partovi
,
Wolfgang Walthes
,
Luca Ravezzi
,
Paul Lindt
,
Sivaraman Chokkalingam
,
Karthik Gopalakrishnan
,
Andreas Blum
,
Otto Schumacher
,
Claudio Andreotti
,
Michael Bruennert
,
Bruno Celli-Urbani
,
Dirk Friebe
,
Ivo Koren
,
Michael Verbeck
,
Ulrich Lange
Data Recovery and Retiming for the Fully Buffered DIMM 4.8Gb/s Serial Links.
ISSCC
(2006)