Clock and Synchronization Networks for a 3 GHz 64 Bit ARMv8 8-Core SoC.

Luca Ravezzi Hamid Partovi

Published in: IEEE J. Solid State Circuits (2015)

Keyphrases

high speed
power consumption
low power
data sets
network design
network structure
network analysis
heterogeneous networks
clock gating
low cost
wireless networks
computer networks