Laurent-Stéphane Didier

Publication Activity (10 Years)

Years Active: 1996-2022
Publications (10 Years): 7

Top Topics

Modular Architecture

Hardware Implementation

Integer Arithmetic

Top Venues

J. Inf. Secur. Appl.

Publications

Laurent-Stéphane Didier, Jean-Marc Robert, Fangan-Yssouf Dosso, Nadia El Mrabet
A software comparison of RNS and PMNS. ARITH (2022)
Asma Chaouch, Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Nadia El Mrabet, Belgacem Bouallegue, Bouraoui Ouni
Two hardware implementations for modular multiplication in the AMNS: Sequential and semi-parallel. J. Inf. Secur. Appl. 58 (2021)
Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Pascal Véron
Efficient modular operations using the adapted modular number system. J. Cryptogr. Eng. 10 (2) (2020)
Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Nadia El Mrabet, Jérémy Marrez, Pascal Véron
Randomization of Arithmetic Over Polynomial Modular Number System. ARITH (2019)
Asma Chaouch, Fangan-Yssouf Dosso, Laurent-Stéphane Didier, Nadia El Mrabet, Bouraoui Ouni, Belgacem Bouallegue
Hardware Optimization on FPGA for the Modular Multiplication in the AMNS Representation. CRiSIS (2019)
Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Pascal Véron
Efficient and secure modular operations using the Adapted Modular Number System. CoRR (2019)
H. Fatih Ugurdag, Florent de Dinechin, Y. Serhan Gener, Sezer Gören, Laurent-Stéphane Didier
Hardware Division by Small Integer Constants. IEEE Trans. Computers 66 (12) (2017)
Benoit Lopez, Thibault Hilaire, Laurent-Stéphane Didier
Formatting Bits to Better Implement Signal Processing Algorithms. PECCS (2014)
Laurent-Stéphane Didier, Luc Jaulmes
;1 adder using carry-chain on FPGA. ACSSC (2013)
Benoit Lopez, Thibault Hilaire, Laurent-Stéphane Didier
Sum-of-products evaluation schemes with fixed-point arithmetic, and their application to IIR filter implementation. DASIP (2012)
Florent de Dinechin, Laurent-Stéphane Didier
Table-Based Division by Small Integer Constants. ARC (2012)
Alexandre Chapoutot, Laurent-Stéphane Didier, Fanny Villers
Range estimation of floating-point variables in Simulink models. DASIP (2012)
Daniel Ménard, Romuald Rocher, Olivier Sentieys, Nicolas Simon, Laurent-Stéphane Didier, Thibault Hilaire, Benoit Lopez, Eric Goubault, Sylvie Putot, Franck Védrine, Amine Najahi, Guillaume Revy, L. Fangain, Christian Samoyeau, Fabrice Lemonnier, Christophe Clienti
Design of fixed-point embedded systems (DEFIS) French ANR project. DASIP (2012)
Laurent-Stéphane Didier, Pierre-Yves Rivaille
A Generalization of a Fast RNS Conversion for a New 4-Modulus Base. IEEE Trans. Circuits Syst. II Express Briefs (1) (2009)
Laurent-Stéphane Didier, Pierre-Yves Rivaille
Une nouvelle base RNS à 4 moduli et son convertisseur vers le binaire. Tech. Sci. Informatiques 27 (6) (2008)
Laurent-Stéphane Didier, Fabien Rico
High Radix BKM Algorithm. Numer. Algorithms 37 (1-4) (2004)
Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup
Modular Multiplication and Base Extensions in Residue Number Systems. IEEE Symposium on Computer Arithmetic (2001)
Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller
A New Euclidean Division Algorithm for Residue Number Systems. J. VLSI Signal Process. 19 (2) (1998)
Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup
An RNS Montgomery Modular Multiplication Algorithm. IEEE Trans. Computers 47 (7) (1998)
Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup
An IWS Montgomery Modular Multiplication Algorithm. IEEE Symposium on Computer Arithmetic (1997)
Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller
A New Euclidean Division Algorithm For Residue Number Systems. ASAP (1996)